The present invention relates generally to power transistors, and more specifically to metal-oxide-semiconductor-gated (MOS-gated) power transistors with strained semiconductor channel regions in a semiconductor heterostructure on a metal substrate.
Conventional semiconductor manufacturing utilizes a number of processes to form semiconductor structures on substrates. In certain devices, the substrate is used as part of the current conduction path. For example, the substrate plays an important role with the solid state switch which is a key semiconductor structure used for discrete device applications and integrated circuits. Solid state switches include, for example, the power metal-oxide-semiconductor field effect transistor (power MOSFET), the insulated-gate bipolar transistor (IGBT), and various types of thyristors. Some of the defining performance characteristics for the power switch are its on-resistance (i.e., drain-to-source on-resistance, RDSon), breakdown voltage, and switching speed.
Generally, device properties such as the switching speed, on-resistance, breakdown voltage, and power dissipation of a typical MOSFET device are influenced by the layout, dimensions, and materials etc. Industry design practice has sought to keep the on-resistance of the MOSFET as low as possible to lower conducting power loss and increase current densities. For example, in vertical power MOSFET devices, the on-resistance is composed of several resistances such as channel resistance, drift region (epitaxial layer) resistance, and substrate resistance. The on-resistance of such a vertical power MOSFET device (as well as other MOSFET devices) is directly influenced by the type and dimensions of materials used to form the drain to source conduction path. Therefore, for a vertical power device, such as a power MOSFET, the substrate is a critical performance element.
Even though conventional techniques have been widely used for making vertical power devices, there are limitations associated with these conventional techniques. Some of these limitations are discussed in detail below.
Thus, there is a need for improved techniques for making vertical devices having desirable device properties while maintaining a simple manufacturing process.